The first library we'll be looking at today is the i2cmaster TWI library. It is extremely useful for connecting to external TWI/I2C hardware quickly and painlessly. This library abstracts I2C functionality into a handy easy to use library. The great thing about i2cmaster is that it can supply I2C for AVRs without native hardware TWI support. Getting StartedExtract i2cmaster.zip. In here, you'll find the core library and a test program.
Make sure you have 4.7k to 10k pull-up resistors on the SCL and SDA lines of your I2C bus. You can try the internal AVR pull-up resistors, but external ones seem more stable. The resistance of the internal ones vary wildly. As you can see above, the difference between an AVR with TWI and one without when using i2cmaster is very subtle. On the ATMega48/88/168 version, the device has hardware TWI support and so SCL and SDA lines are connected to the appropriate pins on the AVR side - the pins are not configurable here. On ATMega48/88/168, SCL is PC5 and SDA is PC4. ATTiny24/44/84 has no built-in TWI support, so in this case we need to use the software version. The placement of SCL and SDA is arbitrary. In the example above, PA0 and PA1 were chosen, but any two pins would suffice. The ports and pins you choose are configured at the top of i2cmaster.S. So be sure to know the capabilities of your device and use the hardware mode if your AVR has one. Check your local datasheet for details. Making An I2C BusEach I2C capable slave device has a unique address. Part of this address is internal to the device. The examples above use 0xA0, but it will be something different for your device. The device datasheet should specify this base address. Most I2C devices supply part of the address exposed as pins that you can configure. In the example above and on many actual I2C devices, these are called A0, A1 and A2. Connect these pins to the power supply or ground to tell the device if A0, A1, A2 should be one or zero, respectively. The actual format is: [internal address, 4 bits] [exposed address, 3 bits] [read/write, 1 bit] So as stated above, the top four bits are set by the manufacturer. The next three are specified by you on A2, A1, and A0, respectively. The final bit specifies read or write mode when sending addresses to the device. The formula for finding the address of your device is: [internal address] + ([external address] << 1) The external address is shifted left by one bit to make room for the read/write bit. i2cmaster uses simple addition to specify read or write mode every time you specify your address. See the example below which addresses device 0xA2 in read and write mode. Since 3 bits are exposed, up to 8 devices with the same internal address can be used with this scheme. Many other devices with differing internal manufacturer addresses can share the same bus. As long as the device works out to have a unique I2C address, it can share this same two wire bus. Setup
Write Sequence
// We're going to write to the device at I2C // Register address. // Data. // Done communicating for now. Read Sequence
// Start up comms. // Read from the device at I2C address 0xA2. // Register address. // Repeat start condition this time with I2C_READ // readNak means we're only reading this one byte // Done communicating for now. |
Software |
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